Engineer for Mixed-Signal ASIC Layout | Engineer für Mixed-Signal-ASIC-Layout (m/w/d)

Job Summary

This role involves the creation and optimization of physical layouts for RF and analog components, specifically utilizing SiGe-BiCMOS technology. The Layout Engineer will be responsible for executing the complete verification process, including DRC and LVS checks using Cadence Assura/PVS, and actively contributing to floorplanning in close coordination with the RF-IC Design and System teams. A key component of the job is the automation and support of development workflows through scripting, particularly using Skill or Python. Candidates must possess deep experience in customized RF and analog layout, strong knowledge of relevant layout methodologies (such as high-frequency wiring and parasitic reduction), and a comprehensive understanding of the entire development lifecycle, from schematic to final GDSII export. This position offers long-term stability within an established technology consulting firm focused on the automotive and aerospace industries.