Research Associate (Circuit Design and Semiconductor Modeling) | wiss. Mitarbeiterin bzw. Mitarbeiter (m/w/d)

Technische Universität Dresden Arbeitsstätte Dresden

Dresden, Sachsen, Deutschland
Published Nov 24, 2025
Full-time
Fixed-term

Job Summary

The Technical University of Dresden (TUD), a German University of Excellence, is seeking a Research Associate to join the Chair of Circuit Technology and Network Theory (PSN). This position supports the groundbreaking QUANTZ project, which aims to develop energy-efficient dual-channel tunnel transistors to revolutionize future microelectronics. The successful candidate will be responsible for implementing a physics-based fundamental model for these novel transistors. Key day-to-day tasks include developing and extending TCAD models, incorporating complex quantum mechanical effects, and transferring these into a compact model suitable for circuit design. Furthermore, the role involves the design and simulation of fundamental analog and digital circuits (e.g., inverters and differential amplifiers) using advanced Computer Aided Design (CAD) tools. Candidates must hold a very good or good university degree (Master's or PhD) in a relevant engineering or physics field, possess deep knowledge of circuit technology and semiconductor device operation, and demonstrate strong analytical skills and commitment. The role offers significant opportunities for further scientific qualification and interdisciplinary collaboration with leading research partners.

Required Skills

Education

University degree (Master or equivalent) or PhD in Electrical Engineering, Communications Engineering, Information Technology, or Physics

Experience

  • Deep knowledge in Circuit Technology
  • Deep knowledge in Semiconductor Device Operation
  • Competency in IC Design methodology
  • Experience in Semiconductor Technology and Measurement Technology
  • Professional experience using TCAD and CAD IC Design tools (helpful)

Languages

English (Fluent)

Additional

  • Fixed-term contract until December 31, 2027 (in line with WissZeitVG regulations)