Senior ASIC Design Engineer | Last Mile Semiconductor GmbH: Senior ASIC Design Engineer (m/w/x)
Last Mile Semiconductor GmbH
Job Summary
This Senior ASIC Design Engineer will play a pivotal role in defining and advancing RF System-on-Chip architecture for a semiconductor startup in Dresden, Germany. The position involves taking responsibility for RTL design of digital blocks and their system-level integration, working closely with analog/RF teams to realize highly integrated RF ASICs. Key responsibilities also include developing and executing functional verification at both block and chip levels, supporting chip qualification, testing, and ramp-up, and documenting development processes. This role offers the opportunity to contribute to cutting-edge 5G cellular chipset development for secure, massive IoT applications within an international team, requiring strong expertise in ASIC digital design and SoC integration.
Required Skills
Education
University degree in Electrical Engineering, Microelectronics, or a comparable field
Experience
- Professional experience in ASIC Digital Design, particularly in SoC integration
- Professional experience in developing and applying modern verification methods (e.g., UVM)
- Experience collaborating with Mixed-Signal design teams is a plus
Languages
Additional
- Not specified
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