Senior ASIC Design Engineer | Last Mile Semiconductor GmbH: Senior ASIC Design Engineer (m/w/x)

Last Mile Semiconductor GmbH

Dresden, Sachsen, Deutschland
Published Jul 24, 2025
Full-time
No information

Job Summary

As a Senior ASIC Design Engineer, you will play a crucial role in defining and advancing the RF System-on-Chip architecture. Your daily responsibilities will involve taking ownership of RTL design for digital blocks and their system-level integration, working closely with Analog/RF teams to realize highly integrated RF ASICs. You will also be responsible for developing and executing functional verification at both block and chip levels, and supporting chip qualification, testing, and ramp-up processes. This position requires meticulous documentation of development processes and results, and active collaboration within an international team. The ideal candidate will possess a strong background in electrical engineering or microelectronics, with significant expertise in ASIC digital design and SoC integration, along with proficiency in SystemVerilog, Verilog, or VHDL.

Required Skills

Education

Degree in Electrical Engineering, Microelectronics, or comparable field

Experience

  • Professional experience in ASIC Digital Design
  • Professional experience in SoC integration
  • Experience in developing and applying modern verification methods (e.g., UVM)
  • Ideally, experience collaborating with Mixed-Signal Design Teams

Languages

English (Fluent)

Additional

  • Not specified