Mixed-Signal ASIC Layout Engineer | Engineer für Mixed-Signal-ASIC-Layout (m/w/d)

ACONEXT Engineering GmbH

München, Bayern, Deutschland
Published Feb 24, 2026
Full-time
Fixed-term

Job Summary

As a Mixed-Signal ASIC Layout Engineer, you will be responsible for the creation and optimization of physical layouts for RF and analog components using SiGe-BiCMOS technology. Operating primarily within the Cadence Virtuoso XL environment, your daily tasks involve executing the complete verification process, including DRC and LVS checks via Cadence Assura or PVS. You will collaborate closely with RF-IC design and system teams to develop floorplans and support the final tape-out process. A unique aspect of this role is the opportunity to automate development workflows using scripting languages like Python or Skill. This position is ideal for technical experts who enjoy high-frequency design challenges and want to work in a collaborative, agile environment with flat hierarchies. The role offers significant flexibility through hybrid work options and a strong focus on work-life balance, making it an attractive choice for professionals seeking both technical depth and modern working conditions.

Required Skills

Education

University degree in Electrical Engineering or a comparable field of study

Experience

  • Several years of professional experience in custom RF and analog layout design
  • Extensive experience with SiGe-BiCMOS technologies
  • Proven expertise in layout methods for component matching, parasitic reduction, and RF shielding
  • Demonstrated experience in high-frequency wiring and the full IC development lifecycle from schematic to tape-out

Languages

Not specified

Additional

  • Locations: Duisburg or Munich. This is a full-time position. While the job description mentions an 'unbefristeter Arbeitsvertrag' (permanent contract) in the benefits section, the metadata indicates 'BEFRISTET' (fixed-term); clarification on contract duration may be required.